This invention relates to a circuit arrangement for increasing the gain-bandwidth product of a CMOS amplifier.
As is well known, an operational amplifier is composed basically of three stages which may be schematized as follows:
an input stage to which a signal to be amplified is applied, PA1 an intermediate, gain stage effective to amplify the value of said signal, and PA1 a final, output stage. PA1 a pair of active components having a characteristic function which corresponds with that of a negative value resistor, for increasing the transconductance of said stage, PA1 a pair of capacitors, each respectively associated with a corresponding one of the active components for introducing a pole/zero pair in the frequency response from the amplifier, and PA1 an additional input stage cross-connected to said cell to bring the frequency value of said zero a predetermined distance away from that of said pole and at a lower frequency than the clipping frequency of the amplifier.
A so-called compensating capacitance is also provided between the input and the output of the gain stage.
For this schematization, reference can be had to the publication: "The monolithic Op Amp: a tutorial study", IEEE Solid-state Circuits, Vol SC-9, pages 314-332, December, 1974.
Also known is that the clipping frequency, i.e. the frequency fu whereat the amplifier has unit gain, is normally coincident with the gain-bandwidth product, and given by the following relation: EQU fu=(1/2)*(gm/Cc)=GBWP=Ao*fd
where, gm is the transconductance of the input stage, Cc is the compensating capacitance, GBWP is the gain-bandwidth product, Ao is the DC gain, and fd is the frequency value at which the gain begins to decrease.
The value of the clipping frequency fu is virtually fixed by the technology, for it should be lower than, but lie not too close to, the value of the dominant pole, lest a deterioration occurs in the so-called phase boundary, the latter being a parameter indicating the stability of a system incorporating a regenerative amplifier.
In many audio applications requiring very low distortion, and wherever the amplifier is employed as a line driver in so-called ISDN networks, there exists a need to have the gain-bandwidth product increased as much as possible relatively to its state coincident with the clipping frequency.
In an attempt at meeting the above demand, the prior art has proposed a solution which consists of introducing a so-called doublet in the open loop frequency response from the operational amplifier at much lower frequencies than the clipping frequency.
In essence, it is a matter of inserting, in the transfer function of the operational amplifier, a pole/zero pair while causing their presence to affect to a negligible amount the value of the phase boundary that is imparting stability to the amplifier.
Such an approach is described, for example, in the publication "A monolithic P-channel JFET quad operational amplifier . . . ", IEEE Journal of Solid State Circuits, Vol. SC-22, No. 6, December 1987, relating the introduction of said doublet to the input stage of the amplifier.
That approach, while basically achieving its objective, has a serious drawback in that it can only be applied substantially to amplifier stages comprising transistors of the bipolar JFET type, and not to the CMOS technology. This results from that the transconductance of CMOS transistors is, for a given size and given bias currents, much lower than that of bipolar transistors, so that the insertion of a pole/zero pair, in accordance with the prior art teachings, in an amplifier comprising MOS transistors would require transistors of a huge size and a very high current flowing therethrough to provide the effect sought.